The present invention relates to a storage management system, and more particularly to a system for managing shared memory area for use in a network system wherein an electronic computer is accessed from a multiplicity of terminals.
It has been general practice to use a transaction system adapted to access a main electronic computer with a high speed throughput and equipped with a mass storage capacity through a multiplicity of terminals by way of public service networks.
FIG. 4 shows the general construction of a common transaction system in which information is fed into a computer 3 from a terminal A through a line 2 and a switching center exchange 1, the computer 3 processing such information and the result thereof being sent to the terminal A or to other terminals B, C. It is a typical characteristic of such a transaction system that information may be applied at random from a plurality of terminals A, B, C, and that such information must be processed with limited resources such as the line 2 and the computer 3.
For example, when different items of information are input at the same time from three terminals A, B, C, three transactions are concurrently processed within the computer 3. With such an arrangement, as these three transactions are in principle effected independently of each other, use of a main memory 4 may be shared for all of these transactions. In this operation, the management and control of main memory 4 is performed according to a Table A for flags as set in the main computer 3. In general, the transaction system has the following specific properties:
(1) A transaction may not be deterministic in terms of processing until it is completed.
(2) A transaction is independent in nature, and is not influenced by the processing of any other transaction.
(3) When any abnormal situation occurs before one transaction is completed, it is essential to return the state of processing to that which existed before that particular transaction started. (Cancellation of a transaction)
(4) It is essential to cancel all transactions that have not been completed when the system goes down.
Let us consider a case where the main memory 4 comprises a multiplicity of memory areas and the terminals A, B and C share one Table B in such areas. When it is desired to use any one of the memory areas of Table B which is divided into segments numbered 1 to 12, the CPU refers to Table A.
In this arrangement, the segments 1 through 12 of Table A may correspond to those numbered 1 through 12 of Table B, respectively. If a certain part of Table B is being used by the terminal A, a corresponding area of Table A is assigned "1", and if a certain part of Table B is not yet being used or is released, a corresponding area of Table A is assigned "0". An item of information contained in Table A is either "1" or "0", which means 1 bit will do. This Table A is called a bit map, and assignment of the value "1" is referred to as "putting up a flag", while assignment of the value "0" is called "putting-down a flag". The CPU searches Table A for any areas to which "0" has been assigned, putting up a flag there for use of the corresponding part of Table B. In this manner, it is possible in practice to avoid any overlapping use of the areas in Table B. When a transaction from for example, terminal A has been satisfactorily completed, CPU may continue to reserve or release the shared area, but when that transaction is completed in an abnormal condition, it is essential to return the state of the shared area to the one that existed before the transaction was started. Moreover, it is necessary with this transaction system to clear information on any transaction which has not been completed when the system goes down, and information on any transaction that has been completed must be held. However, according to the conventional system in which a flag is put up for Table A while a transaction is being conducted to prevent any possible conflict from occurring, it is not possible to put down a flag when the system is down. This causes an undesirable misalignment of the system.
In an attempt to resolve the inconveniences noted above, the present invention is essentially directed at providing an improved kind of shared memory area management system capable of preventing misalignment in a network system under any operating conditions, and yet which does not involve any reduction in the throughput capacity of the network system.